AMD has introduced the Kintex UltraScale+ Gen 2 FPGA family with PCIe Gen4 to support 4K AV-over-IP operation for 4K/8K media operations.

AMD has launched the Kintex UltraScale+ Gen2 FPGA, which counts enhancing 4K and 8K media workflows among its aims. Memory, I ...

AMD has announced the launch of its Kintex UltraScale+ Gen 2 FPGA family, introducing updated memory, I/O and security features aimed at designers of performance‑critical, mid‑range systems.

It's our hope that products such as these will inspire you to create your own new offerings. The 0.80-mm-pitch sockets’ milled contact surfaces smooth out mating/unmating cycles as they deliver high ...

Here are some of the latest stories, videos, and podcasts from the month of January.

Greetings, and welcome to Microchip's Q3 Fiscal Year '26 Financial Results Conference Call. [Operator Instructions] As a reminder, this conference is being recorded. It is now my pleasure to introduce ...

Abstract: In this paper, we present the Prism Bridge, a soft IP core developed to bridge FPGA-MPSoC systems using high-speed serial links. Considering the current trend of ubiquitous serial ...

A low latency 10G Ethernet MAC/PCS, written in SystemVerilog and tested with pyuvm/cocotb An integrated low latency 10G Ethernet core, with MAC/PCS and GTY wrapper/IP for Xilinx UltraScale+ An example ...

Last year, Semtech released the LR2021 LoRa Plus transceiver chip, designed to address the low data-rate issue associated with LoRa, but surprisingly, ...

A new transceiver invented by electrical engineers at the University of California, Irvine boosts radio frequencies into 140-gigahertz territory, unlocking data speeds that rival those of physical ...

UC Irvine engineers announced last Wednesday they developed a wireless transceiver achieving 120 Gbps speeds, matching fiber optic performance for the first time in wireless data transmission. The ...